Daisy CLKSEL question

AnkitAnkit Parikh
edited July 2020 in Build-it-yourself

Hello,
I have been working on interfacing the daisy board with one of the nordic nRf52 devkit. I assumed that CLKSEL was connected to DVDD so the ADS chip was using the internal clock. After probing with a logic analyser the MISO data wasn't as excepted.
Then I checked the continuity from CLKSEL pin to DVDD and GND and found out that CLKSEL pin is connected to the ground and the ADS module is expecting an external clock.
Please confirm that I don't have a faulty board and there is an error in the schematics.

regards
Ankit

Comments

  • wjcroftwjcroft Mount Shasta, CA

    Ankit, hi.

    Can you clarify, did you purchase a 16 channel OpenBCI Cyton + Daisy from the Shop? Does your Daisy work fine with your Cyton?

    re: the clocking, see below:

    --

    There was a previous thread on this subject, where Joel remarks that the clock signal from the mainboard ADS is wired over to the clock on the Daisy,

    http://openbci.com/forum/index.php?p=/discussion/161/daisy-and-main-board-sample-synchronization

    In terms of the schematics, Daisy,

    https://raw.githubusercontent.com/OpenBCI/Docs/master/assets/images/OBCI_V3_Daisy-Schematic.jpg

    On the Daisy, CLK and SCLK are routed from the mainboard to the Daisy, through one of the header connectors. CLK is output by the mainboard ADS (the sample clock) and consumed by the Daisy ADS CLK. SCLK is the serial clock (for the SPI interface), driven by the PIC32 and sent to both ADSs. The two ADSs also have separately driven CS chip selects.

    And mainboard,

    https://raw.githubusercontent.com/OpenBCI/Docs/master/assets/images/OBCI_V3_32bit-Schematic.jpg

    My understanding is that Joel wired the Daisy this way (rather than using the DAISY_IN pin ability of the ADS1299, so that EACH ADS could be independently controlled as far as channel settings. If you do it the datasheet method for daisy-ing, you lose that ability.

    Regards, William

  • AnkitAnkit Parikh
    edited July 2020

    Hello William,
    Please refer to the ADS1299 datasheet section 9.3.2.2
    You will notice that connecting CLKSEL to VDD chooses internal clock oscillator.

    Now check the schematics that you have shared in the link
    https://raw.githubusercontent.com/OpenBCI/Docs/master/assets/images/OBCI_V3_Daisy-Schematic.jpg
    The CLKSEL pin to connected to DVDD as shown in the image in my original post.

    I checked the continuity on the V3 Daisy board, the CLKSEL pin is connected to GND. I checked this on 2 boards and can confirm that the schematics have an error. I have the cyton board and do not intend to use it.

    All I am doing is highlighting an issue with the schematics that is misleading users to think the Daisy module is using the internal clock.
    Regards
    Ankit

  • wjcroftwjcroft Mount Shasta, CA

    Correct, Daisy must use external clock, so it samples simultaneously with the mainboard ADS1299. Thanks for the heads up on the schematic error. There have been some schematic minor errors in the past as well.

  • KarthekaKartheka
    edited June 2022

    Hi,

    I'm building my own 16 channel EEG and I found the daisy board error documentation where the slave ADS CLKSEL is to be connected to AGND. However, in your documentation, you have mentioned that you have taken PIN 52 (CLKSEL) and connected with pin51 which was plain ground. But I found the ADS Datasheet and pin51 is DGND not AGND. Can you please confirm that DGND and AGND are the same in this case.

  • wjcroftwjcroft Mount Shasta, CA

    @Kartheka, hi.

    I merged your new thread, into this existing thread on the same subject. See previous comments.

    Regards, William

Sign In or Register to comment.

© Vanilla Keystone Theme 2026