Ganglion hardware design flaw & misunderstanding?
Hi all,
I think these things. There's some widespread misunderstanding about the Ganglion analog design, maybe even among the designers themselves. There’s a design flaw that puts our entire signals in the AFE’s unspecified region, though it apparently results in performance that’s at least acceptable enough for the flaw to have gone unnoticed. (If I'm wrong about all that, I hope my seeming-audacity is forgiven).
The design flaw, in 2 sentences:
The AFE’s negative analog inputs, and the DC component of the AFE’s positive analog inputs, sit at about 1.2 volts. But the AFE spec says accuracy is unspecified for voltages above 1 volt.
Detail:
I know not everyone “speaks circuit”, others are super-experts. I hope to write much of this for a broad audience but there will be parts that diverge from that.
First, the signal that's marked GNDA on the schematic, and silkscreened on the board, is "the" ground for the board. An old but very accessible & still useful schematic for Ganglion is here: https://github.com/OpenBCI/Ganglion_Hardware_Design_Files/blob/master/Ganglion_SCH.pdf. If you’re willing to look at it, you can probably see that GNDA is the negative side of the battery. It’s also the ground for all of the voltage regulators. It's connected to digital grounds, for example to what the Simblee calls "GND" and the AFE (Analog Front End, MCP3912) calls "DGND". It's connected to what the AFE considers its analog ground, which it calls AGND.
To sort out what's happening in the signal-input area, I re-drew (in a form that to me is more readable) the analog part of the Ganglion schematic that's associated with just channel 1’s input. I think you can see it here: https://drive.google.com/file/d/1Zg9Fn4cOBfgG5YeKsQxh6xKx5fuShm-z/view?usp=sharing. Also, although the AFE spec is kind of a biggie, it’s at http://ww1.microchip.com/downloads/en/DeviceDoc/20005348A.pdf and I’ll be referring just to specific parts of it.
One thing to notice is that Ganglion is applying at least +1.2V-relative-to-GNDA, onto what the AFE calls CH0- relative-to-its-AGND. But look at the AFE spec, page 3. The “Analog Input Absolute Voltage on CHn+/- pins, n between 0 and 3”, measured relative to AGND, isn’t supposed to be as high as +1.2V, it’s supposed to be between -1V and +1V.
Though there’s no “Note 6” notation with that spec (nor anywhere else in the pdf), it seems that note 6 near the bottom of that page applies to that spec … it says “Outside of this range, ADC accuracy is not specified. An extended input range of +/-2V can be applied continuously to the part with no damage.” That echoes what can be seen near the top of that page for Absolute Maximum Ratings, indicating that values higher than +2V or lower than -2V can cause permanent damage. (I think in our case it’s unlikely, but …).
If you were to analyze the instrumentation amp / high-pass-pole circuitry associated with U2 & U1, you would also see that the AFE’s CH0+ signal hangs out at +1.2V, from which it makes signal- & noise-dependent excursions somewhat above and below that value. In fact, a moderate-speed +16mV excursion on board-input 1_IN+ relative to 1_IN- could likely cause >2V on AFE CH0, into possible-permanent-damage range.
So relative to GNDA, Ganglion’s U2 & U1 arrange for the mean value of (CH0-) and (time-averaged-CH0+) to be +1.2V. We call that voltage the common-mode voltage relative to GNDA (in contrast to the differential-mode voltage which is the difference between CH0- and CH0+). But the AFE’s design intent is to have a common mode voltage of preferably 0 volts (though it accepts +1V at the most, -1V at the least), with excursions going above and below its AGND which again is Ganglion’s GNDA. The spec makes that clear on page 30, 2nd paragraph, ending with “For best performance, the common-mode signals should be maintained to AGND”.
Comments
I'm planning to copy the basic ganglion AFE circuitry for a barebones 4ch EEG amplifier (see my earlier post),
I'm wondering if there's been any more update on this issue. It wouldn't be tough for me to add the aforementioned voltage divider between the the MCP3912 REFOUT pin and the U6B noninverting input and to swap the LM7332 for an op amp with less bias current.
Quick update, I tried implementing the solution @bpwork proposed and it seems to be working well. I'm measuring 0.49 V as my V_REF, and the IA outputs are all pretty stable at 0.49 V when not connected to any inputs.